Anritsu MP1764C

The MP1764C Error Detector is used in combination with the MP1763C Pulse Pattern Generator for 12.5G Bit Error Rate Testing to evaluate components and systems in conformity with ITU-T standards. Complicated searching for input thresholds or phase adjustments is simplified with the touch of a single key. These functions are ideally suited for the research and development of ultrahigh speed logic ICs and digital communication systems.

This is the only 12.5G BERT system with differential inputs and ¼ differential outputs required for SAN market device applications. In addition, this system supports 4.25G CDR for Fibre Channel applications.