快速報價: Tektronix 82A04B

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Tektronix 82A04B

Phase Reference Module

型號

82A04B

產品類別

Oscilloscopes & Logic Analyzers

製造商

Tektronix

配置型號包含以下特性:

Oscilloscopes & Logic AnalyzersSampling Oscilloscopes20GHz <= 50GHz

配置

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特性	參數
High Frequency (range)	20GHz <= 50GHz

產品總覽

The 82A04B Phase Reference Module extends the capability of the DSA8300 Digital Serial Analyzer sampling oscilloscope1by providing extremely low jitter/drift sample position information to the mainframe. This sample position information is based on the phase of a clock the user provides to the 82A04B input.

Also compatible with DSA8200 and TDS/CSA8200 sampling oscilloscopes.

Key Features

Flexible operation:
Triggered
Untriggered (Free-running) Acquisition Without Trigger Signal

Support for enhanced acquisition modes (Frame Scan)

Small module implementation allows:
Acquisition on six other channels
Placement close to the DUT with module extender cable

Fast acquisition rate

Applications

Design, verification, and manufacturing of computer

Telecom, and Datacom components and systems operating at 10 Gb/s and faster

Specifications
Phase Reference Module
Model Overview
Feature	Parameters
Acquisition modes	Free Run Synchronous, Triggered Synchronous
Mainframe resources	Any one active 2 small (electrical) module slot. Both acquisition channels associated with the slot became unavailable. Only one 82A04B module can be activated in a mainframe at a time
Compatible mainframes	DSA8300, DSA8200, CSA/TDS8200. Does not operate in the CSA/TDS8000 or 8000B mainframes
Operational amplitude	100 mVp-p to 2.0 Vp-p
Guaranteed frequency range	2 GHz - 32 GHz continuous; for a non sine wave reference clock signal in the 2 GHz - 8 GHz range an additional filter 3 typically is required
	2 GHz - 60 GHz continuous with Option 60G; for a non sine wave reference clock signal in the 2 GHz - 8 GHz range an additional filter 3 typically is required
	The 82A04B module does not require particularly high spectral fidelity in the clock signal passed to it; the signal can be BW limited (such as by the cable) since there can be no ISI issues (as the signal is a clock); it is sufficient to supply a signal that is stable, free from unstable moding, and has the appropriate amplitude
Jitter	System jitter of <100 fsRMS, on a 10 GHz or faster acquisition module, in DSA8300 mainframe, with f ≥8 GHz, VREF ≥0.6 V phase reference signal
	System jitter of 140 fs RMS typical, on a 10 GHz or faster acquisition module, in DSA8300 mainframe, with 2 GHz ≤ f <8 GHz, VREF ≥0.6 V phase reference signal ≥0.6 V phase reference signa
Maximum timing deviation relative to phase reference signal	Horizontal position >40 ns after trigger event: 0.2% of phase reference signal period (typical)
	Horizontal position ≤40 ns after trigger event: 0.4% of phase reference signal period (typical)
Maximum timing deviation relative to phase reference signal	0.1% or better of phase reference signal period (typical)
Input impedance	50 Ω ±0.5 Ω AC (5 pF typical AC coupling)
Connector	1.85 mm female (‘V’) connector
	Precision adapter to 2.92 mm female included with 50 Ω SMA termination

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